Cell geometry effect on IGT latch-up
- 1 August 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 6 (8) , 419-421
- https://doi.org/10.1109/edl.1985.26176
Abstract
The effect of the emitter cell geometry on insulated gate transistor (IGT) performance has been investigated. The three-dimensional well resistances (emitter shunting resistance) of the square, circular, stripe, and multiple surface short (MSS) have been calculated. The MSS cell geometry has the lowest emitter shunting resistance. As a result, MSS cell has the highest latch-up current capability. It has been experimentally proven that the stripe cell has extremely high latch-up current, and the MSS cell design is current limited. The IGT's with circular and square cell have the lowest latch-up current capability.Keywords
This publication has 4 references indexed in Scilit:
- Cell geometry effect on IGT latch-upIEEE Electron Device Letters, 1985
- Switching speed enhancement in insulated gate transistors by electron irradiationIEEE Transactions on Electron Devices, 1984
- The COMFET—A new high conductance MOS-gated deviceIEEE Electron Device Letters, 1983
- The insulated gate rectifier (IGR): A new power switching devicePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982