Buried oxide fringing capacitance: a new physical model and its implication on SOI device scaling and architecture
- 20 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Silicon-on-Insulator Technology: Materials to VLSIPublished by Springer Nature ,1997
- Simulation and two-dimensional analytical modeling of subthreshold slope in ultrathin-film SOI MOSFETs down to 0.1 mu m gate lengthIEEE Transactions on Electron Devices, 1993