Simulating phase noise in phase-locked loops with a circuit simulator

• 19 November 2002
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• Vol. 3, 1760-1763
• https://doi.org/10.1109/iscas.1995.523754

Abstract

Keywords

• SPICE
• CIRCUIT ANALYSIS COMPUTING
• DISCRETE FOURIER TRANSFORMS
• FREQUENCY-DOMAIN ANALYSIS
• PHASE LOCKED LOOPS
• PHASE NOISE
• TRANSIENT ANALYSIS
• VOLTAGE-CONTROLLED OSCILLATORS
• PSPICE
• CIRCUIT SIMULATOR
• DISCRETE FOURIER TRANSFORM
• FREQUENCY DOMAIN
• PHASE-LOCKED LOOPS
• REFERENCE OSCILLATOR
• TRANSIENT ANALYSIS CAPABILITIES
• VOLTAGE-CONTROLLED OSCILLATOR