Low defect planar SOI islands adjacent to selective epitaxial growth (SEG)
- 1 June 1995
- journal article
- Published by Elsevier in Microelectronic Engineering
- Vol. 28 (1-4) , 435-438
- https://doi.org/10.1016/0167-9317(95)00091-l
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Fully planar method for creating adjacent ‘‘self-isolating’’ silicon-on-insulator and epitaxial layers by epitaxial lateral overgrowthApplied Physics Letters, 1992
- SOI design for competitive CMOS VLSIIEEE Transactions on Electron Devices, 1990
- High-speed, low-power, implanted-buried-oxide CMOS circuitsIEEE Electron Device Letters, 1986