Accurate Logic Simulation Models for TTL Totempole and MOS Gates and Tristate Devices
- 1 September 1981
- journal article
- website
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Bell System Technical Journal
- Vol. 60 (7) , 1271-1287
- https://doi.org/10.1002/j.1538-7305.1981.tb00266.x
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Concurrent simulation of nearly identical digital networksComputer, 1974
- A three-value computer design verification systemIBM Systems Journal, 1969
- Hazard Detection in Combinational and Sequential Switching CircuitsIBM Journal of Research and Development, 1965