Protocol verification as a hardware design aid
Top Cited Papers
- 2 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 522-525
- https://doi.org/10.1109/iccd.1992.276232
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- The Verilog® Hardware Description LanguagePublished by Springer Nature ,1991
- Trace Theory for Automatic Hierarchical Verification of Speed-Independent CircuitsPublished by MIT Press ,1989
- An introduction to Estelle: A specification language for distributed systemsComputer Networks and ISDN Systems, 1987
- Expressing interesting properties of programs in propositional temporal logicPublished by Association for Computing Machinery (ACM) ,1986