Design of an associative processor array
- 1 January 1989
- journal article
- Published by Institution of Engineering and Technology (IET) in IEE Proceedings E Computers and Digital Techniques
- Vol. 136 (5) , 374-382
- https://doi.org/10.1049/ip-e.1989.0050
Abstract
The architecture of a new associative processor array chip, working name GLiTCH, is described and details are given of the techniques used in its VLSI design. The low-level operating characteristics of the chip are explained. A number of system configurations are explored and finally the use of GLiTCH in a vision processing module, currently being designed, is described.Keywords
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