Modeling the impurity profile in an ion-implanted layer of an IGFET for the calculation of threshold voltages

1 January 1981

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 28 (1) , 116-117
https://doi.org/10.1109/T-ED.1981.20291

Abstract

An extremely simple model for the impurity profile in an ion-implanted channel layer of an IGFET is applied to simulating the substrate bias dependence of its threshold voltage. Excellent agreement is obtained between theory and experiment on n-channel silicon devices.

Keywords

MODEL
SILICON
BIAS
AGREEMENT
SUBSTRATE
EXTREMELY
ION IMPLANTED
IMPURITY PROFILE