43-ps 5.2-GHz macrocell array LSIs
- 1 January 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 23 (5) , 1182-1188
- https://doi.org/10.1109/4.5942
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Design and application of a 2500-gate bipolar macrocell arrayIEEE Journal of Solid-State Circuits, 1985
- Gigabit logic bipolar technology: advanced super self-aligned process technologyElectronics Letters, 1983
- Applications of low-level differential logicPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1975
- Experimental Evaluation of High Energy Ion Implantation Gradients for Possible Fabrication of a Transistor Pedestal CollectorIBM Journal of Research and Development, 1971