New algorithms for increased efficiency in hierarchical design rule checking
- 31 December 1987
- journal article
- Published by Elsevier in Integration
- Vol. 5 (3-4) , 319-336
- https://doi.org/10.1016/0167-9260(87)90022-8
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Multiple Storage Quad Trees: A Simpler Faster Alternative to Bisector List Quad TreesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
- Exploitation of Hierarchy in Analyses of Integrated Circuit ArtworkIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1982