Microprocessor realization of a linear predictive vocoder.
- 24 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A microprocessor realization for a linear predictive vocoder is presented. The goal was a low power, low cost, compact special purpose realization of a narrowband speech terminal. The resultant design is a general purpose two bus structure running at a 150 ns cycle time using as the basic signal processing element four of the AMD 2901 CPE chips. This basic structure is augmented by a four cycle multiplier to allow for sufficient signal processing power. The design concessions that mark the LPCM as a special purpose machine designed to be a speech terminal are: limited I/O, and limited memory. The present design requires 162 dual-in-line packages, dissipates less than 45 watts and occupies about 1/3 cubic foot.Keywords
This publication has 3 references indexed in Scilit:
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- Parallel Processing Techniques for Estimating Pitch Periods of Speech in the Time DomainThe Journal of the Acoustical Society of America, 1969