A versatile 0.13 μm CMOS platform technology supporting high performance and low power applications

11 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 571-574
https://doi.org/10.1109/iedm.2000.904384

Abstract

A modular 0.13 /spl mu/m CMOS platform has been developed to support a wide range of applications, including embedded non-volatile memory (NVM). The high performance core device with a 18 /spl Aring/ gate oxide supports the high end needs of the technology. In addition, medium performance and low leakage 25 /spl Aring/ devices are provided in the technology platform to service the low power applications, with low off-state leakage. The peripheral I/O devices support both 2.5 V (50 /spl Aring/) and 3.3 V (70 /spl Aring/) interfaces. Gate lengths range from 110 to 80 nm. Optical enhancement techniques allow use of 248 nm KrF lithography to meet the patterning needs. The interconnect technology allows for two low-k dielectric options with K-values in the range from 2.9 to 3.6. Aggressive design rules, fully compatible with 248 nm KrF systems allow for high logic densities and a 2.48 um/sup 2/ 6T embedded SRAM cell. The technology has been exercised using a 4MB SRAM test vehicle with good yields.

Keywords

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