A Josephson technology system level experiment
- 1 October 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 2 (10) , 262-265
- https://doi.org/10.1109/EDL.1981.25426
Abstract
This letter describes the first system level test vehicle in Josephson technology. The experiment consists of four circuit chips assembled on two cards in a high density, 3-dimensional, card-on-board package. A data path, which is representative of a critical path of a future prototype processor, was successfully operated with a minimum cycle time of 3.7ns. The path simulates a jump control sequence and a cache access in each machine cycle. This experiment incorporates the essential components of the logic, power and package portions of a Josephson technology prototype.Keywords
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