Logic Partition Orderings for Multi-FPGA Systems

• 1 January 1995
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• https://doi.org/10.1109/fpga.1995.241942

Abstract

Keywords

• CIRCUIT TOPOLOGY
• FIELD PROGRAMMABLE GATE ARRAYS
• ROUTING
• COMPUTER SCIENCE
• LOGIC CIRCUITS
• PARALLEL PROCESSING
• APPLICATION SPECIFIC INTEGRATED CIRCUITS