A video decoder for H.261 video teleconferencing and MPEG stored interactive video applications
- 1 January 1993
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A 450-MOPS video decoder that decompresses both H.261 and MPEG (Motion Picture Experts Group) compressed video streams is described. The decoder accepts bit rates up to 4 Mb/s and provides decoded frames of up to 352*288 pixels (CIF) at up to 30 frame/s operating at 45 MHz. The decoder places no restrictions on the H.261 bit streams. It decodes any combination of intra and predictive frames in QCIF or CIF format. In MPEG mode, it decodes any stream conforming to the MPEG constrained parameters, including any combination of intra, predictive, and bidirectional frames with half-pixel motion vectors. The architecture features a mix of dedicated hardware functions and programmable processors. The design methodology used for the decoder included extensive high-level modeling at two levels: a C++ behavioral model and a set of clock-cycle-accurate C models at the block level.Keywords
This publication has 1 reference indexed in Scilit:
- A real time P*64/MPEG video encoder chipPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1993