Digital neural emulators using tree accumulation and communication structures
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Neural Networks
- Vol. 3 (6) , 934-950
- https://doi.org/10.1109/72.165595
Abstract
Three digital artificial neural network processors suitable for the emulation of fully interconnected neural networks are proposed. The processors use N(2) multipliers and an arrangement of tree structures that provide the communication and accumulation function either individually or in a combined manner using communicating adder trees. The performance for the emulation of an N-neuron network for all processors is achieved in 2log(2)N+C time units, where C is a constant equal to the multiplication, neuron activation, and internal fixed delays. The feasibility and characteristics of the proposed configurations to emulate single and/or multiple neural networks simultaneously are discussed, and a comparison with recently proposed neurocomputer architectures is reported.Keywords
This publication has 14 references indexed in Scilit:
- A flexible architecture for neural networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- WSI architecture of a neurocomputer modulePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- RAP: a ring array processor for multilayer perceptron applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A DSP based board for neural network simulationMicroprocessing and Microprogramming, 1991
- A digital neural network architecture for VLSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1990
- VLSI architectures for neural networksIEEE Micro, 1989
- Neurons with graded response have collective computational properties like those of two-state neurons.Proceedings of the National Academy of Sciences, 1984
- Embedding Tree Structures in VLSI Hexagonal ArraysIEEE Transactions on Computers, 1984
- VLSI Performance Comparison of Banyan and Crossbar Communications NetworksIEEE Transactions on Computers, 1981
- The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSIIEEE Transactions on Computers, 1981