Determination of contact parameters of interconnecting layers in VLSI circuits

1 March 1986

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 33 (3) , 328-334
https://doi.org/10.1109/t-ed.1986.22491

Abstract

This paper presents a generalized electrical model of the interlayer contacts in integrated circuits and discusses various test structures capable of providing experimental data on the contacts. The techniques used for obtaining the specific contact resistance for the contacts and, where appropriate, the modification to conducting layer resistivities due to interactions Within the contact area are outlined. Using one of the techniques, experimental data on a polysilicon to single-crystal silicon contact is used as an example to obtain contact information. These results are discussed along with the experimental limitations applicable to the various techniques.

Keywords

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