A Note on Easily Testable Realizations for Logic Functions
- 1 March 1974
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-23 (3) , 332-333
- https://doi.org/10.1109/T-C.1974.223935
Abstract
It is shown that at most, n + 3 tests are required to detect any single stuck-at fault in an AND gate or a single faulty EXCLUSIVE OR (EOR) gate in a Reed-Muller canonical form realization of a switching function.Keywords
This publication has 1 reference indexed in Scilit:
- Easily Testable Realizations ror Logic FunctionsIEEE Transactions on Computers, 1972