Logic Upset Level of GaAs SRAMs for Pulsed Ionizing Radiation
- 1 January 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 30 (6) , 4173-4177
- https://doi.org/10.1109/tns.1983.4333103
Abstract
The first pulsed ionizing radiation logic upset measurements on GaAs 256-bit static RAMs are reported and analyzed. The circuit design utilized GaAs enhancement junction field-effect transistors (E-JFETs) with resistive loads and direct-coupled field-effect transistor logic (DCFL). The test results demonstrated upset levels for the most sensitive cells in the range of 6 × 109 to 1 × 1010 rad(GaAs)/s. All evaluated memories contained a core of hard memory cells which retained their logic state up to a dose rate of 3 × 1011 rad(GaAs)/s. A tentative model for memory state upset is presented, which includes the semi-insulating substrate currents generated by ionizing radiation and predicts the observed behavior of the static RAMs tested.Keywords
This publication has 5 references indexed in Scilit:
- Channel and Substrate Currents in GaAs FETS Due to Ionizing RadiationIEEE Transactions on Nuclear Science, 1983
- Ionizing Radiation Response of GaAs JFETs and DCFL CircuitsIEEE Transactions on Nuclear Science, 1982
- Radiation Effects in Gaas Junction Field-Effect TransistorsIEEE Transactions on Nuclear Science, 1980
- Transient Response of GaAs IC's to Ionizing RadiationIEEE Transactions on Nuclear Science, 1979
- Transient Response of Epitaxial GaAs JFET Structures to Ionizing RadiationIEEE Transactions on Nuclear Science, 1973