Generation of Fault Tests for Linear Logic Networks
- 1 January 1972
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-21 (1) , 79-83
- https://doi.org/10.1109/T-C.1972.223433
Abstract
In this note we study the problem of fault detection in linear logic networks. We introduce the concept of error vectors that indicate how the effect of a fault propagates through a network. These vectors allow one to identify redundancies in the network as well as calculate the output of the network given a fault and an input. Problems related to fault diagnosis and the detection of multiple faults are also considered.Keywords
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