Timing variation in dual loop benchmark
- 1 April 1988
- journal article
- Published by Association for Computing Machinery (ACM) in ACM SIGAda Ada Letters
- Vol. VIII (3) , 98-106
- https://doi.org/10.1145/44772.44778
Abstract
Benchmarks that measure time values using a standard system clock often employ a dual loop design. One of the important assumptions of this design is that textually identical loop statements will take the same amount of time to execute. This assumption has been tested on two bare computers with Ada® test programs and has been demonstrated to be inaccurate in these specific test cases.This publication has 1 reference indexed in Scilit:
- Toward real-time performance benchmarks for AdaCommunications of the ACM, 1986