Dielectrically isolated saturating circuits
- 1 September 1968
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 15 (9) , 645-650
- https://doi.org/10.1109/T-ED.1968.16422
Abstract
A description of the three main substrate preparation processes to achieve silicon dioxide dielectric isolation are described. The use of dielectric isolation for high-speed and low-power circuits is outlined, with calculations of saturation resistance and transient characteristics. Introduction of carrier lifetime-reducing gold into a dielectrically isolated wafer can cause problems, which are delineated. Final results are listed and Photomicrographs of working circuits are presented.Keywords
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