Optimizing Photonic Variable-Integer-Delay Circuits
- 1 January 1987
- proceedings article
- Published by Optica Publishing Group
Abstract
We present photonic circuits for temporal processing of photonic signals by a controlled variation in the delay of a photonic signal path. Since they provide variable delay in increments of some fixed elementary value, we call them variable integer delays. We present three structures, called parallel, series re-entrant, and series feed-forward. One application is in a photonic time-slot interchanged Pl in which all the data from an input time-slot experience the appropriate delay to emerge in the assigned time-slot in the output. We optimize two parameters: the total number of switches in the structure (roughly proportional to cost) and the number of switches through which any photonic signal must pass (roughly proportional to insertion loss).Keywords
This publication has 1 reference indexed in Scilit:
- Experimental photonic time-slot interchanger using optical fibers as reentrant delay-line memoriesPublished by Optica Publishing Group ,1986