Defects in preamorphized single-crystal silicon

Abstract
Direct electrical characterization of 1-μm-thick Si+ preamorphized and epitaxially regrown silicon layers has revealed a low concentration of residual deep-level defects within the regrown layer. A deep-level trap at Ec −0.40 eV has been found associated with the amorphous-crystalline boundary dislocation loops. In addition, a near mid-gap trap at Ev+0.54 eV, observed in p-type samples, is believed to be responsible for a spatially localized generation current of ∼2×10−6 A/cm2 associated with the dislocation loops.