Next generation PowerPC/sup TM/ microprocessor test strategy improvements
- 23 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 414-423
- https://doi.org/10.1109/test.1997.639644
Abstract
The first PowerPC microprocessor in the new G3 generation of designs, the MPC750, incorporates new test strategy approaches to improve the product test quality, reliability, and debug, and to reduce the total time to market.Keywords
This publication has 3 references indexed in Scilit:
- The PowerPC 603 microprocessor: an array built-in self test mechanismPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Balancing structured and ad-hoc design for test: testing of the PowerPC 603 microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A G3 PowerPC/sup TM/ superscalar low-power microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002