Instruction set design and optimizations for address computation in DSP architectures
- 24 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- Using register-transfer paths in code generation for heterogeneous memory-register architecturesPublished by Association for Computing Machinery (ACM) ,1996
- Address calculation for retargetable compilation and exploration of instruction-set architecturesPublished by Association for Computing Machinery (ACM) ,1996
- Register allocation via hierarchical graph coloringPublished by Association for Computing Machinery (ACM) ,1991
- Register allocation & spilling via graph coloringPublished by Association for Computing Machinery (ACM) ,1982
- Covering Points of a Digraph with Point-Disjoint Paths and Its Application to Code OptimizationJournal of the ACM, 1977