Alignment markers for e-beam writing of the gate level pattern: Fabrication in an intermediate stage and alignment accuracy
- 31 December 1987
- journal article
- Published by Elsevier in Microelectronic Engineering
- Vol. 6 (1-4) , 117-122
- https://doi.org/10.1016/0167-9317(87)90025-6
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Submicron gate level process step using e-beam lithographyMicroelectronic Engineering, 1985
- Silicon as a mechanical materialProceedings of the IEEE, 1982