Theta /sub JC/ characterization of chip packages-justification, limitations, and future

1 January 1989

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Abstract

A discussion is presented of thermal figures-of-merit (FOMs) for chip package thermal resistance, for use in evaluating competing thermal designs, and analysis techniques, for use in determining operating temperature profiles. The junction-to-case thermal resistance, Theta /sub JC/, as well as the junction-to-fluid thermal resistance, have been used in both of these roles for first-level packaging. The use of a modified Theta /sub JC/ is proposed. Experimental data indicate that the relations developed are capable not only of accurately describing the chip temperature for a variety of thermal management strategies, but also of highlighting the impact of specific thermal design features.

Keywords

This publication has 2 references indexed in Scilit:

Package thermal resistance model dependency on equipment design
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
Thermal characterization of plastic and ceramic surface-mount components
IEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1988