Verification of delayed-reset domino circuits using ATACS

• 20 January 2003
• proceedings article
• Published by Institute of Electrical and Electronics Engineers (IEEE)
• p. 3-12
• https://doi.org/10.1109/async.1999.761518

Abstract

Keywords

• DELAYED RESET
• RESET DOMINO
• DOMINO CIRCUITS
• USING ATACS
• VERIFICATION