Driving large capacitance in MOS LIS systems
- 1 February 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (1) , 159-161
- https://doi.org/10.1109/jssc.1984.1052103
Abstract
No abstract availableThis publication has 2 references indexed in Scilit:
- Delay-time optimization for driving and sensing of signals on high-capacitance paths of VLSI systemsIEEE Journal of Solid-State Circuits, 1979
- Comments on "An optimized output stage for MOS integrated circuits" [with reply]IEEE Journal of Solid-State Circuits, 1975