Constraint satisfaction for test program generation

19 November 2002

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 45-48
https://doi.org/10.1109/pccc.1995.472513

Abstract

A central problem in automatic test generation is solvingconstraints for memory access generation. A framework, andan algorithm that has been implemented in the Model-BasedTest-Generator are described. This generic algorithm allowsflexibility in modeling new addressing modes with whichmemory accesses are generated. The algorithm currentlyhandles address constraint satisfaction for complex addressingmodes in the PowerPC, x86, and other architectures.

Keywords

FORMAL VERIFICATION
HEART
POWERPC
SOFTWARE TESTING
CONSTRAINT SATISFACTION
ADDRESSING MODES
VIRTUAL MACHINES
FORMAL SPECIFICATION
GENERIC ALGORITHM
PREDICTIVE MODELS
REGISTERS
MODEL BASED TESTING
COMPUTER ARCHITECTURE
MEMORY MANAGEMENT

This publication has 1 reference indexed in Scilit:

Constraint-based automatic test data generation
IEEE Transactions on Software Engineering, 1991