AN IMPROVED FULLY CMOS COMPATIBLE BIPOLAR STRUCTURE

Abstract
A fully CMOS compatible bipolar technology is studied. 2-D process simulations of the device have been carried out before wafer processing ; comparisons of the results with experiments are presented. A new idea for making the collector, without standard epitaxy of a highly doped buried layer, is described. The 2-D simulation results enable the advantages to be checked with regard to the classical approach

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