A practical comparison of the systolic and wavefront array processing architectures
- 23 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 10, 296-299
- https://doi.org/10.1109/icassp.1985.1168512
Abstract
The development of a wavefront array processor for recursive least-squares minimization is described. It comprises a triangular array of processors each of which emulates the INMOS transputer chip. The array is programmed in occam - an associated high level language also developed by INMOS Ltd. Preliminary experiments have been carried out to compare the performance of the wavefront array with that of the associated systolic array. The results are presented.Keywords
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