Polysilicon resistor trimming for packaged integrated circuits
- 30 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 247-250
- https://doi.org/10.1109/iedm.1993.347359
Abstract
No abstract availableThis publication has 7 references indexed in Scilit:
- Lightly trimming the hybridsIEEE Circuits and Devices Magazine, 1993
- Effects of crystallization on trap state densities at grain boundaries in polycrystalline siliconIEEE Electron Device Letters, 1987
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- Dopant segregation in polycrystalline siliconJournal of Applied Physics, 1980
- A novel MOS PROM using a highly resistive poly-Si resistorIEEE Transactions on Electron Devices, 1980
- Electrical trimming of heavily doped polycrystalline silicon resistorsIEEE Transactions on Electron Devices, 1979
- A precision trim technique for monolithic analog circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1975