Selected harmonic reduction in static D-C — A-C inverters
- 1 July 1964
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communication and Electronics
- Vol. 83 (73) , 374-378
- https://doi.org/10.1109/tcome.1964.6541241
Abstract
An a-c voltage control technique is described that eliminates the third and fifth harmonic voltage present in the a-c load-voltage waveform of a 2-controlled-rectifier or transistor d-c to a-c single-phase inverter. The addition of two more controlled rectifiers or transistors to the basic circuit makes it possible to control the fundamental frequency component of the a-c load voltage from maximum to zero without reintroducing the third and fifth harmonics. The same technique can be used in a 12-controlled-rectifier or transistor d-c to 3-phase a-c inverter. In the case of the 3-phase inverter, the lowest harmonic of the fundamental frequency present in the line-to-line a-c voltage is the eleventh.Keywords
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