A million-cycle CMOS 256K EEPROM

23 March 2005

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 78-79
https://doi.org/10.1109/isscc.1987.1157155

Abstract

This paper will discuss a device with an endurance of 1-million cycles and a read access time of 150ns, fabricated in 1.25μm double poly CMOS. Circuit modes include byte write and page write, with means of endurance selection.

Keywords

EPROM
LATCHES
CMOS TECHNOLOGY
PROTECTION
VOLTAGE
TESTING
CIRCUITS
POWER DISSIPATION
CMOS PROCESS
DIELECTRICS

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