Low power memory architectures for video applications
- 27 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 12 references indexed in Scilit:
- High-level power estimationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Power exploration for data dominated video applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Low-power data transfer and storage exploration for H.263 video decoder systemIEEE Journal on Selected Areas in Communications, 1998
- Cache design trade-offs for power and performance optimizationPublished by Association for Computing Machinery (ACM) ,1995
- Power consumption estimation in CMOS VLSI chipsIEEE Journal of Solid-State Circuits, 1994
- Wisconsin Architectural Research Tool SetACM SIGARCH Computer Architecture News, 1993
- New fast algorithms for the estimation of block motion vectorsIEEE Transactions on Circuits and Systems for Video Technology, 1993
- A 200-MHz 64-b dual-issue CMOS microprocessorIEEE Journal of Solid-State Circuits, 1992
- Experimental evaluation of on-chip microprocessor cache memoriesPublished by Association for Computing Machinery (ACM) ,1984
- Cache MemoriesACM Computing Surveys, 1982