This paper describes how the assembly program, now being written for the new University of Illinois digital computer ILLIAC 2, optimizes the computation and compilation of the address field. The compilation is necessary because the address field may contain general expressions which involve the contents of modifiers (index registers) and are therefore only computable at execution time rather than at assembly time. The optimization is advisable because some computation can be done at assembly time; the remainder must be done at execution time, but may be done in either of the two arithmetic units available in ILLIAC 2. Expressions involving modifiers additively or subtractively were first introduced into this assembly language to enable the programmer to make simple use of the multiple indexing facilities available in hardware. Since it had been found desirable in other assemblers to allow multiplication (and division) of symbolic addresses and integers, and since, in this assembler, symbolic addresses may be defined as representing either numbers or the contents of modifiers, it was decided to allow general expressions of both numbers and modifiers. A simple algorithm is described which, in a single scan of the address field, reorganizes the calculation in order to assign each of the operations in the address field in a near optimum manner to the appropriate one of the three calculating units—the assembly computer, the floating-point accumulator (FAC) and the address accumulator (AAC).