An analytical model for the low- emitter-impurity-concentration transistor
- 1 June 1978
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 21 (6) , 821-832
- https://doi.org/10.1016/0038-1101(78)90306-4
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- An analytical model for the epitaxial bipolar transistorSolid-State Electronics, 1977
- Some aspects of LEC transistor behaviourSolid-State Electronics, 1976
- Merged-transistor logic (MTL)-a low-cost bipolar logic conceptIEEE Journal of Solid-State Circuits, 1972
- A Note on the Extended Theory of the Junction TransistorJournal of the Physics Society Japan, 1956
- Large-Signal Behavior of Junction TransistorsProceedings of the IRE, 1954
- On the Variation of Junction-Transistor Current-Amplification Factor with Emitter CurrentProceedings of the IRE, 1954