Soft Error Analysis of Fully Static MOS RAM

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Abstract
The static MOS RAM with the polysilicon resistive load for the cell has been analyzed with respect to alpha-particle induced soft error phenomena. The analytical model of soft error will be presented and the effective critical charge Q crit will be derived. Fully static 16 K-bit NMOS RAMs were fabricated as test vehicles, which were exposed to Am-241 radiation sources for an accelerated test method. The error rate depends on the cycle time and the cell pull-up resistance in the shorter cycle time operation. But in the longer cycle mode, it is regardless of them. Some techniques for error rate reduction which involve thinning gate oxide thickness, adopting Hi–C structure and cell layout techniques will be introduced and their effects will be discussed.

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