A FASTBUS Controller Module Using a MULTIBUS MPU

1 January 1983

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science

Vol. 30 (1) , 216-219
https://doi.org/10.1109/tns.1983.4332257

Abstract

The architecture, adaptability and performance of SLAC's single board controller module will be detailed. Example uses with an 8086 MPU and with a 68000 MPU will be given. Details of circuit design and software interface will be provided.

Keywords

FASTBUS
PROTOTYPES
MICROPROCESSORS
SOFTWARE PERFORMANCE
LOGIC TESTING
LINEAR ACCELERATORS
COMPUTER ARCHITECTURE
CIRCUIT SYNTHESIS
AVAILABILITY
MICROCOMPUTERS

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