Multi-dimensional systolic networks, for discrete fourier transform

Abstract
In this paper the problem of computing the Discrete Fourier Transform (DFT) in VLSI is considered. We describe an approach to extend the linear systolic array algorithm to the multidimensional systolic network algorithm. The proposed networks is based on the pipeline design and have regular structure. Among them the mesh-connected network matches, with a small factor, the known theoretical &Ohgr;(n2) lower bound to the (area × time2) measure of complexity in the planar VLSI.

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