Incorporation of a Photonic Layer at the Metallizations Levels of a CMOS Circuit
- 1 January 2006
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 19492081,p. 200-202
- https://doi.org/10.1109/group4.2006.1708212
Abstract
The integration of a photonic layer on a CMOS circuit can be done either by wafer bonding of an SOI photonic circuit or by low temperature fabrication of a photonic layer at the metallization levelsKeywords
This publication has 1 reference indexed in Scilit:
- Heterogeneous integration of microdisk lasers on silicon strip waveguides for optical interconnectsIEEE Photonics Technology Letters, 2005