A Monte Carlo simulation environment for wear out in VLSI systems
- 1 January 1991
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 249-254
- https://doi.org/10.1109/isvd.1991.185125
Abstract
The authors describe a simulation environment for reliability prediction of VLSI designs. Specifically, the effect of electromigration on the time-to-failure is investigated. The capabilities of the environment are illustrated with a case study of a microprocessor intended for control applications. The system under investigation is first simulated at the switch level and trace data on the switching activity is collected. This data is then used along with Monte Carlo simulation to model wear-out at the chip-level.Keywords
This publication has 9 references indexed in Scilit:
- Statistical modeling of silicon dioxide reliabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- RELIANT: a reliability analysis tool for VLSI interconnectIEEE Journal of Solid-State Circuits, 1989
- Accelerated testing of time-dependent breakdown of SiO2IEEE Electron Device Letters, 1987
- Measurement and modeling of computer reliability as affected by system activityACM Transactions on Computer Systems, 1986
- The Distribution of Electromigration Failures8th Reliability Physics Symposium, 1986
- MOS VLSI reliability and yield trendsProceedings of the IEEE, 1986
- Novel Mechanism for Tunneling and Breakdown of Thin SiFilmsPhysical Review Letters, 1983
- Electromigration failure modes in aluminum metallization for semiconductor devicesProceedings of the IEEE, 1969
- Monte Carlo MethodsPublished by Springer Nature ,1964