This paper describes Multiplexer (MPX) and Demultiplexer (DMPX) composed of Source Coupled FET Logic (SCFL). First, we report the advantage of using SCFL as a basic logic circuit, espesially from the point of view of the allowance for the variation of the FET threshold voltage. The advantage of using double-phase SCFL circuit is demonstrated by circuit simulation. Then its application to MPX and DMPX ICs are reported. The fabricated ICs operate above 1.6 GHz with low dissipation power and high yield.