A new n-channel Si-gate technology for high packing density, high-speed MOS LSI

1 January 1975

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 295-298
https://doi.org/10.1109/iedm.1975.188883

Abstract

A newly developed n-channel Si-gate technology, "Gate Oxidation Method" (G.O.M.), uses high resistivity substrates (20Ω.cm) and only one boron ion implantation process. The E-mode transistor threshold voltage is controlled by the lost boron ions into the growing gate oxide.

Keywords

LARGE SCALE INTEGRATION
BORON
SUBSTRATES
OXIDATION
THRESHOLD VOLTAGE
CONDUCTIVITY
CIRCUIT TESTING
ION IMPLANTATION
SILICON
TEMPERATURE

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