An algorithm-base fault tolerance (more than one error) using concurrent error detection for FFT processors

Publisher Website

17 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/glsv.1994.289995

Abstract

No abstract available

Keywords

This publication has 5 references indexed in Scilit:

A novel concurrent error detection scheme for FFT networks
IEEE Transactions on Parallel and Distributed Systems, 1993
Algorithm-based fault detection for signal processing applications
IEEE Transactions on Computers, 1990
Fault-tolerant FFT networks
IEEE Transactions on Computers, 1988
A fault-tolerant FFT processor
IEEE Transactions on Computers, 1988
Two VLSI Structures for the Discrete Fourier Transform
IEEE Transactions on Computers, 1983