Analytical Techniques for Controlled Collapse Bump Structures

1 March 1982

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE) in 8th Reliability Physics Symposium

No. 07350791,p. 194-201
https://doi.org/10.1109/irps.1982.361927

Abstract

A non-destructive technique has been developed to analyze Controlled Collapse Bump (CCB) structures. This technique, which will not destroy or alter the bump structure until failure mechanism information has been obtained, involves removal of the supporting silicon structure by R.F. sputtering. Upon completion of the silicon removal all metallization including the bump and the chip's runners are left intact. The approach was validated by accurate resistance measurements of the bump/metallization paths before and after chip removal. Additional, destructive analysis was accomplished on some samples by repotting and sectioning through the bumps.

Keywords

This publication has 0 references indexed in Scilit: