Optimised integrated CMOS optical receiver for optical interconnects

1 January 1993

journal article
Published by Institution of Engineering and Technology (IET) in IEE Proceedings J Optoelectronics

Vol. 140 (2) , 107-114
https://doi.org/10.1049/ip-j.1993.0019

Abstract

The optimisation of an optical receiver is discussed and transient charcteristics of two basic simple integrated receivers in CMOS systems are analysed and compared in detail. In analysis, a maximum current parameter is developed and used for optimisation design. Among these two receivers, the low-impedance configuration is presented for high-speed operation. SPICE simulation and preliminary experimental results with discrete devices are also illustrated and discussed.

Keywords

SPICE SIMULATION
MAXIMUM CURRENT PARAMETER
OPTIMISATION DESIGN
OPTICAL INTERCONNECTS
TRANSIENT CHARACTERISTICS
LOW-IMPEDANCE CONFIGURATION
HIGH-SPEED OPERATION
INTEGRATED CMOS OPTICAL RECEIVER
INTEGRATED OPTOELECTRONICS

This publication has 1 reference indexed in Scilit:

A low-impedance load detector circuit for optical interconnects
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003