A Module Level Simulation Technique for Systems Composed of LSI's And MSI's
- 1 January 1978
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper describes newly developed techniques suitable for logic verification and fault simulation of digital systems which are mainly composed of LSI's and MSI's. A simulator employing such techniques has been implemented, and has shown definite advantages over existing simulators.Keywords
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